The present invention relates to bit aligned block transfer (bitblt) hardware used to copy or move data from one area of memory to another within the display hardware of a computer system.
A standard architecture for display hardware includes an image control system for creating, modifying and moving image data, an image storage system for holding the image data after being processed by the image control system, and an image display system for translating the stored image data to a visible image on a cathode-ray-tube (CRT). A standard image display system uses a technique called raster scanning to display stored image data. In a raster scan, a beam starts in the upper left hand corner of a display screen and moves horizontally across the screen. The beam is turned off when it reaches the end of the horizontal line and is repositioned at the beginning of the next lower horizontal line. This process repeats until the beam reaches the lower right hand corner of the screen after which the beam is turned off and returned to the upper left hand corner where the process repeats. In a bit mapped system, the raster screen is treated as an array of picture elements (pixels) which have a controllable intensity and/or color. To control the pixel outputs on the screen, the image control system modifies the data value in an associated image storage address location of memory.
The quality of the image displayed on the screen is improved by increasing the number of raster lines and the number of pixels displayed in each raster line. However, increasing the number of pixels increases the time the image control system takes to modify a screen off image data. When blocks of data are modified on a screen, the image processor conventionally reads the data value associated with each pixel located in the block, modifies it, and writes each pixel into a memory location. Therefore, the larger the block of data, the longer the time required for the image processor to update the screen. Furthermore, with increased pixel resolution a given size block of image data contains more pixel data to process. To relieve the burden on the image control processor when large blocks of data are changed, special bitblt hardware has been developed. Bitblt hardware modifies data arrays faster than a general purpose image control processor and frees the image processor to perform additional functions. A bitblt involves reading a data value from the image storage system, performing a "raster operation" on the data and writing the result back into the image storage system. This process is repeated for each pixel in the defined block to be altered. Raster operations are logic functions that use the source data value and the destination data value to modify the bitblt pixel values. Since a period of time is required to move the data to and from the image storage system, data transfers can be a major bottleneck in performing bitblt operations.